Talk:Seymour Cray/Archives/2017
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"Imprecise interrupts"
I believe the statements below that appear in the current version of the biography are incorrect.
When other companies (namely IBM) attempted to create machines with similar performance, they stumbled (Stretch/IBM 7030). Indeed, the 6600 solved a critical design problem — "imprecise interrupts"[8] — that was largely responsible for IBM's failure. He did this by replacing I/O interrupts with a polled request issued by one of 10 so-called peripheral processors, ...
Namely,
- Interrupts in the IBM Stretch were precise.
- I believe that the recovery time for mispredicted arithmetic branches and the store delays were worse performance problems for Stretch than interrupts.
- Exceptions in the CDC 6600, such as exponent overflow, were imprecise.
- I believe that Cray and Thornton were likely inspired by the UNIVAC LARC in off-loading I/O from the CDC 6600 central processor to the PPUs; see Thornton's 1980 paper in the Annals of the History of Computing entitled "The CDC 6600 Project". I believe that their decision about off-loading I/O was unrelated to whether exceptions should be precise or imprecise and that it was made so that the central processor could execute application code without the overhead of I/O interrupts. I believe that Cray saw this approach to I/O as fast and simple. (Note: the subsequent CDC 7600 used a different scheme for I/O that included I/O interrupts.)
Mark Smotherman 2620:103:A000:401:6DB6:6118:DEA6:248F (talk) 00:23, 28 July 2017 (UTC)
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