Talk:M-PHY

	This article was reviewed by member(s) of WikiProject Articles for creation. The project works to allow users to contribute quality articles and media files to the encyclopedia and track their progress as they are developed. To participate, please visit the project page for more information.Articles for creationWikipedia:WikiProject Articles for creationTemplate:WikiProject Articles for creationAfC articles
	This article was accepted from this draft on 22 April 2018 by reviewer Joe Decker (talk · contribs).

Telecommunications

	Telecommunication portal This article is within the scope of WikiProject Telecommunications, a collaborative effort to improve the coverage of Telecommunications on Wikipedia. If you would like to participate, please visit the project page, where you can join the discussion and see a list of open tasks.TelecommunicationsWikipedia:WikiProject TelecommunicationsTemplate:WikiProject TelecommunicationsTelecommunications articles
???	This article has not yet received a rating on the project's importance scale.

Sentence needs rework[edit]

Expanded for clarity:

Options to extend its range could include

operation over a short flexible flat cable,

and M-PHY was designed to support optical media converters allowing extended distance between transmitters and receivers,

and reducing concerns with electromagnetic interference.

One of these things is anti-parallel.

Also, maybe just "reduce EMI"?

Finally, why "flexible"? Flexible invites kink, and kink is bad. — MaxEnt 21:36, 19 January 2023 (UTC)[reply]

Strong source[edit]

Here is a strong source I don't have the gas to work into the article.^[1]

References

^ Loberg, Chris (2 September 2014). "D-PHY, M-PHY & C-PHY? First Look at Testing MIPI's Latest PHY". eetimes.com. EE Times. Retrieved 19 January 2023. MIPI sees M-PHY as the high-performance PHY with speeds up to 5.8 Gbps while D-PHY is more for cameras and displays and lower-speed applications.

More about C-PHY:

In contrast, C-PHY uses a 3-pin architecture and an embedded clock. Each of the pin trios represents one lane with up to three lanes supported for a total of 9 pins. It also uses a new encoding scheme to increase the number of bits transmitted to approximately 2.28 bits per symbol. The projected data rate is 2.5 Gsymbols/s for an effective data rate of about 5.7 Gbits/s.

— MaxEnt 23:34, 19 January 2023 (UTC)[reply]

[Loberg2014-1] Loberg, Chris (2 September 2014). "D-PHY, M-PHY & C-PHY? First Look at Testing MIPI's Latest PHY". eetimes.com. EE Times. Retrieved 19 January 2023. MIPI sees M-PHY as the high-performance PHY with speeds up to 5.8 Gbps while D-PHY is more for cameras and displays and lower-speed applications.

[1]